Master in Security of Integrated Systems and Application : Secure your future

Program

VHDL Design (28h)

Jacques Rouillard

Design of secure devices

  1. Introduction to integrated systems (7h)
  2. VHDL design (28h)
  3. VHDL synthesis (14h)
  4. Smart cards and silicon technologies (7h)
  5. Design of a cryptographic module (42h)
  6. Integrated circuits test (17.5h)
  7. Formal verification (17.5h)
  8. Embedded systems development (21h)
  9. Hardware security (7h)
  10. Side-channel analysis and counter-measures (28h)
  11. Fault analysis and counter-measures (17.5h)
  12. Bus security and integrated networks (3.5h)

Synopsis

This teaches VHDL, mostly applied to simulation.

It assumes a basic knowledge of end-users computer tools (PC, Windows, Unix), a practical knowledge of a programming language and some experience in numerical electronic design (integrated or not).

The course mainly aims at becoming autonomous in VHDL design.

The formation is mostly pratical; all theoretical concepts are immediately followed by applications through the development and simulation of ad-hoc examples in the three modelisation modes: data flow mode, structure mode and behavior mode.

Timetable

(A session amounts to 13/4 hours.)
Session 1
HDLs: presentation, necessity, market
Session 2
Turning of simulator into account: first example, models of time, structure and data
Session 3
Lexic, types, resolving
Session 4
Description modes
Session 5
Configuration, event-based simulation
Session 6
Modularity, libraries, logical types (in addition to BIT)
Session 7
Data flow modelisation
Session 8
Generate genericity
Sessions 9–12
Additioner, N-bit additioner, multiplier slice, wired multiplier
Session 13
Functional modelisation: instructions
Session 14
RAM
Session 15
ROM
Session 16
ALU

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